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Siddharth Garg
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Reliable Computing with Ultra-Reduced Instruction Set Coprocessors
Low cost permanent fault detection using ultra-reduced instruction set co-processors
Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms
EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only)
EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip
Reliable computing with ultra-reduced instruction set co-processors
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